;CodeVisionAVR C Compiler V1.24.0 Standard
;(C) Copyright 1998-2003 HP InfoTech s.r.l.
;http://www.hpinfotech.ro
;e-mail:office@hpinfotech.ro

;Chip type           : AT90S8535
;Clock frequency     : 4,000000 MHz
;Memory model        : Small
;Optimize for        : Size
;(s)printf features  : int, width
;(s)scanf features   : long, width
;External SRAM size  : 0
;Data Stack size     : 128 byte(s)
;Heap size           : 0 byte(s)
;Promote char to int : No
;char is unsigned    : Yes
;8 bit enums         : Yes
;Automatic register allocation : On
;Use AVR Studio 3 Terminal I/O   : No

	.DEVICE AT90S8535
	.LISTMAC
	.EQU UDRE=0x5
	.EQU RXC=0x7
	.EQU USR=0xB
	.EQU UDR=0xC
	.EQU EERE=0x0
	.EQU EEWE=0x1
	.EQU EEMWE=0x2
	.EQU SPSR=0xE
	.EQU SPDR=0xF
	.EQU EECR=0x1C
	.EQU EEDR=0x1D
	.EQU EEARL=0x1E
	.EQU EEARH=0x1F
	.EQU WDTCR=0x21
	.EQU MCUCR=0x35
	.EQU RAMPZ=0x3B
	.EQU SPL=0x3D
	.EQU SPH=0x3E
	.EQU SREG=0x3F

	.DEF R0X0=R0
	.DEF R0X1=R1
	.DEF R0X2=R2
	.DEF R0X3=R3
	.DEF R0X4=R4
	.DEF R0X5=R5
	.DEF R0X6=R6
	.DEF R0X7=R7
	.DEF R0X8=R8
	.DEF R0X9=R9
	.DEF R0XA=R10
	.DEF R0XB=R11
	.DEF R0XC=R12
	.DEF R0XD=R13
	.DEF R0XE=R14
	.DEF R0XF=R15
	.DEF R0X10=R16
	.DEF R0X11=R17
	.DEF R0X12=R18
	.DEF R0X13=R19
	.DEF R0X14=R20
	.DEF R0X15=R21
	.DEF R0X16=R22
	.DEF R0X17=R23
	.DEF R0X18=R24
	.DEF R0X19=R25
	.DEF R0X1A=R26
	.DEF R0X1B=R27
	.DEF R0X1C=R28
	.DEF R0X1D=R29
	.DEF R0X1E=R30
	.DEF R0X1F=R31

	.EQU __se_bit=0x40
	.EQU __sm_mask=0x30
	.EQU __sm_powerdown=0x20

	.MACRO __CPD1N
	CPI  R30,LOW(@0)
	LDI  R26,HIGH(@0)
	CPC  R31,R26
	LDI  R26,BYTE3(@0)
	CPC  R22,R26
	LDI  R26,BYTE4(@0)
	CPC  R23,R26
	.ENDM

	.MACRO __CPD2N
	CPI  R26,LOW(@0)
	LDI  R30,HIGH(@0)
	CPC  R27,R30
	LDI  R30,BYTE3(@0)
	CPC  R24,R30
	LDI  R30,BYTE4(@0)
	CPC  R25,R30
	.ENDM

	.MACRO __CPWRR
	CP   R@0,R@2
	CPC  R@1,R@3
	.ENDM

	.MACRO __CPWRN
	CPI  R@0,LOW(@2)
	LDI  R30,HIGH(@2)
	CPC  R@1,R30
	.ENDM

	.MACRO __ADDD1N
	SUBI R30,LOW(-@0)
	SBCI R31,HIGH(-@0)
	SBCI R22,BYTE3(-@0)
	SBCI R23,BYTE4(-@0)
	.ENDM

	.MACRO __ADDD2N
	SUBI R26,LOW(-@0)
	SBCI R27,HIGH(-@0)
	SBCI R24,BYTE3(-@0)
	SBCI R25,BYTE4(-@0)
	.ENDM

	.MACRO __SUBD1N
	SUBI R30,LOW(@0)
	SBCI R31,HIGH(@0)
	SBCI R22,BYTE3(@0)
	SBCI R23,BYTE4(@0)
	.ENDM

	.MACRO __SUBD2N
	SUBI R26,LOW(@0)
	SBCI R27,HIGH(@0)
	SBCI R24,BYTE3(@0)
	SBCI R25,BYTE4(@0)
	.ENDM

	.MACRO __ANDD1N
	ANDI R30,LOW(@0)
	ANDI R31,HIGH(@0)
	ANDI R22,BYTE3(@0)
	ANDI R23,BYTE4(@0)
	.ENDM

	.MACRO __ORD1N
	ORI  R30,LOW(@0)
	ORI  R31,HIGH(@0)
	ORI  R22,BYTE3(@0)
	ORI  R23,BYTE4(@0)
	.ENDM

	.MACRO __DELAY_USB
	LDI  R24,LOW(@0)
__DELAY_USB_LOOP:
	DEC  R24
	BRNE __DELAY_USB_LOOP
	.ENDM

	.MACRO __DELAY_USW
	LDI  R24,LOW(@0)
	LDI  R25,HIGH(@0)
__DELAY_USW_LOOP:
	SBIW R24,1
	BRNE __DELAY_USW_LOOP
	.ENDM

	.MACRO __CLRD1S
	CLR  R30
	STD  Y+@0,R30
	STD  Y+@0+1,R30
	STD  Y+@0+2,R30
	STD  Y+@0+3,R30
	.ENDM

	.MACRO __GETD1S
	LDD  R30,Y+@0
	LDD  R31,Y+@0+1
	LDD  R22,Y+@0+2
	LDD  R23,Y+@0+3
	.ENDM

	.MACRO __PUTD1S
	STD  Y+@0,R30
	STD  Y+@0+1,R31
	STD  Y+@0+2,R22
	STD  Y+@0+3,R23
	.ENDM

	.MACRO __POINTB1MN
	LDI  R30,LOW(@0+@1)
	.ENDM

	.MACRO __POINTW1MN
	LDI  R30,LOW(@0+@1)
	LDI  R31,HIGH(@0+@1)
	.ENDM

	.MACRO __POINTW1FN
	LDI  R30,LOW(2*@0+@1)
	LDI  R31,HIGH(2*@0+@1)
	.ENDM

	.MACRO __POINTB2MN
	LDI  R26,LOW(@0+@1)
	.ENDM

	.MACRO __POINTW2MN
	LDI  R26,LOW(@0+@1)
	LDI  R27,HIGH(@0+@1)
	.ENDM

	.MACRO __GETD1N
	LDI  R30,LOW(@0)
	LDI  R31,HIGH(@0)
	LDI  R22,BYTE3(@0)
	LDI  R23,BYTE4(@0)
	.ENDM

	.MACRO __GETD2N
	LDI  R26,LOW(@0)
	LDI  R27,HIGH(@0)
	LDI  R24,BYTE3(@0)
	LDI  R25,BYTE4(@0)
	.ENDM

	.MACRO __GETD2S
	LDD  R26,Y+@0
	LDD  R27,Y+@0+1
	LDD  R24,Y+@0+2
	LDD  R25,Y+@0+3
	.ENDM

	.MACRO __GETB1MN
	LDS  R30,@0+@1
	.ENDM

	.MACRO __GETW1MN
	LDS  R30,@0+@1
	LDS  R31,@0+@1+1
	.ENDM

	.MACRO __GETD1MN
	LDS  R30,@0+@1
	LDS  R31,@0+@1+1
	LDS  R22,@0+@1+2
	LDS  R23,@0+@1+3
	.ENDM

	.MACRO __GETBRMN
	LDS  R@2,@0+@1
	.ENDM

	.MACRO __GETWRMN
	LDS  R@2,@0+@1
	LDS  R@3,@0+@1+1
	.ENDM

	.MACRO __GETB2MN
	LDS  R26,@0+@1
	.ENDM

	.MACRO __GETW2MN
	LDS  R26,@0+@1
	LDS  R27,@0+@1+1
	.ENDM

	.MACRO __GETD2MN
	LDS  R26,@0+@1
	LDS  R27,@0+@1+1
	LDS  R24,@0+@1+2
	LDS  R25,@0+@1+3
	.ENDM

	.MACRO __PUTB1MN
	STS  @0+@1,R30
	.ENDM

	.MACRO __PUTW1MN
	STS  @0+@1,R30
	STS  @0+@1+1,R31
	.ENDM

	.MACRO __PUTD1MN
	STS  @0+@1,R30
	STS  @0+@1+1,R31
	STS  @0+@1+2,R22
	STS  @0+@1+3,R23
	.ENDM

	.MACRO __PUTBMRN
	STS  @0+@1,R@2
	.ENDM

	.MACRO __PUTWMRN
	STS  @0+@1,R@2
	STS  @0+@1+1,R@3
	.ENDM

	.MACRO __GETW1R
	MOV  R30,R@0
	MOV  R31,R@1
	.ENDM

	.MACRO __GETW2R
	MOV  R26,R@0
	MOV  R27,R@1
	.ENDM

	.MACRO __GETWRN
	LDI  R@0,LOW(@2)
	LDI  R@1,HIGH(@2)
	.ENDM

	.MACRO __PUTW1R
	MOV  R@0,R30
	MOV  R@1,R31
	.ENDM

	.MACRO __PUTW2R
	MOV  R@0,R26
	MOV  R@1,R27
	.ENDM

	.MACRO __ADDWRN
	SUBI R@0,LOW(-@2)
	SBCI R@1,HIGH(-@2)
	.ENDM

	.MACRO __ADDWRR
	ADD  R@0,R@2
	ADC  R@1,R@3
	.ENDM

	.MACRO __SUBWRN
	SUBI R@0,LOW(@2)
	SBCI R@1,HIGH(@2)
	.ENDM

	.MACRO __SUBWRR
	SUB  R@0,R@2
	SBC  R@1,R@3
	.ENDM

	.MACRO __ANDWRN
	ANDI R@0,LOW(@2)
	ANDI R@1,HIGH(@2)
	.ENDM

	.MACRO __ANDWRR
	AND  R@0,R@2
	AND  R@1,R@3
	.ENDM

	.MACRO __ORWRN
	ORI  R@0,LOW(@2)
	ORI  R@1,HIGH(@2)
	.ENDM

	.MACRO __ORWRR
	OR   R@0,R@2
	OR   R@1,R@3
	.ENDM

	.MACRO __EORWRR
	EOR  R@0,R@2
	EOR  R@1,R@3
	.ENDM

	.MACRO __GETWRS
	LDD  R@0,Y+@2
	LDD  R@1,Y+@2+1
	.ENDM

	.MACRO __PUTWSR
	STD  Y+@2,R@0
	STD  Y+@2+1,R@1
	.ENDM

	.MACRO __MOVEWRR
	MOV  R@0,R@2
	MOV  R@1,R@3
	.ENDM

	.MACRO __INWR
	IN   R@0,@2
	IN   R@1,@2+1
	.ENDM

	.MACRO __OUTWR
	OUT  @2+1,R@1
	OUT  @2,R@0
	.ENDM

	.MACRO __CALL1MN
	LDS  R30,@0+@1
	LDS  R31,@0+@1+1
	ICALL
	.ENDM

	.MACRO __NBST
	BST  R@0,@1
	IN   R30,SREG
	LDI  R31,0x40
	EOR  R30,R31
	OUT  SREG,R30
	.ENDM


	.MACRO __PUTB1SN
	LDD  R26,Y+@0
	LDD  R27,Y+@0+1
	SUBI R26,LOW(-@1)
	SBCI R27,HIGH(-@1)
	ST   X,R30
	.ENDM

	.MACRO __PUTW1SN
	LDD  R26,Y+@0
	LDD  R27,Y+@0+1
	SUBI R26,LOW(-@1)
	SBCI R27,HIGH(-@1)
	ST   X+,R30
	ST   X,R31
	.ENDM

	.MACRO __PUTD1SN
	LDD  R26,Y+@0
	LDD  R27,Y+@0+1
	SUBI R26,LOW(-@1)
	SBCI R27,HIGH(-@1)
	RCALL __PUTDP1
	.ENDM

	.MACRO __PUTB1SNS
	LDD  R26,Y+@0
	LDD  R27,Y+@0+1
	ADIW R26,@1
	ST   X,R30
	.ENDM

	.MACRO __PUTW1SNS
	LDD  R26,Y+@0
	LDD  R27,Y+@0+1
	ADIW R26,@1
	ST   X+,R30
	ST   X,R31
	.ENDM

	.MACRO __PUTD1SNS
	LDD  R26,Y+@0
	LDD  R27,Y+@0+1
	ADIW R26,@1
	RCALL __PUTDP1
	.ENDM

	.MACRO __PUTB1PMN
	LDS  R26,@0
	LDS  R27,@0+1
	SUBI R26,LOW(-@1)
	SBCI R27,HIGH(-@1)
	ST   X,R30
	.ENDM

	.MACRO __PUTW1PMN
	LDS  R26,@0
	LDS  R27,@0+1
	SUBI R26,LOW(-@1)
	SBCI R27,HIGH(-@1)
	ST   X+,R30
	ST   X,R31
	.ENDM

	.MACRO __PUTD1PMN
	LDS  R26,@0
	LDS  R27,@0+1
	SUBI R26,LOW(-@1)
	SBCI R27,HIGH(-@1)
	RCALL __PUTDP1
	.ENDM

	.MACRO __PUTB1PMNS
	LDS  R26,@0
	LDS  R27,@0+1
	ADIW R26,@1
	ST   X,R30
	.ENDM

	.MACRO __PUTW1PMNS
	LDS  R26,@0
	LDS  R27,@0+1
	ADIW R26,@1
	ST   X+,R30
	ST   X,R31
	.ENDM

	.MACRO __PUTD1PMNS
	LDS  R26,@0
	LDS  R27,@0+1
	ADIW R26,@1
	RCALL __PUTDP1
	.ENDM

	.MACRO __GETB1SX
	MOV  R30,R28
	MOV  R31,R29
	SUBI R30,LOW(-@0)
	SBCI R31,HIGH(-@0)
	LD   R30,Z
	.ENDM

	.MACRO __GETW1SX
	MOV  R30,R28
	MOV  R31,R29
	SUBI R30,LOW(-@0)
	SBCI R31,HIGH(-@0)
	LD   R0,Z+
	LD   R31,Z
	MOV  R30,R0
	.ENDM

	.MACRO __GETD1SX
	MOV  R30,R28
	MOV  R31,R29
	SUBI R30,LOW(-@0)
	SBCI R31,HIGH(-@0)
	LD   R0,Z+
	LD   R1,Z+
	LD   R22,Z+
	LD   R23,Z
	MOV  R30,R0
	MOV  R31,R1
	.ENDM

	.MACRO __GETB2SX
	MOV  R26,R28
	MOV  R27,R29
	SUBI R26,LOW(-@0)
	SBCI R27,HIGH(-@0)
	LD   R26,X
	.ENDM

	.MACRO __GETW2SX
	MOV  R26,R28
	MOV  R27,R29
	SUBI R26,LOW(-@0)
	SBCI R27,HIGH(-@0)
	LD   R0,X+
	LD   R27,X
	MOV  R26,R0
	.ENDM

	.MACRO __GETD2SX
	MOV  R26,R28
	MOV  R27,R29
	SUBI R26,LOW(-@0)
	SBCI R27,HIGH(-@0)
	LD   R0,X+
	LD   R1,X+
	LD   R24,X+
	LD   R25,X
	MOV  R26,R0
	MOV  R27,R1
	.ENDM

	.MACRO __GETBRSX
	MOV  R30,R28
	MOV  R31,R29
	SUBI R30,LOW(-@1)
	SBCI R31,HIGH(-@1)
	LD   R@0,Z
	.ENDM

	.MACRO __GETWRSX
	MOV  R30,R28
	MOV  R31,R29
	SUBI R30,LOW(-@2)
	SBCI R31,HIGH(-@2)
	LD   R@0,Z+
	LD   R@1,Z
	.ENDM

	.MACRO __LSLW8SX
	MOV  R30,R28
	MOV  R31,R29
	SUBI R30,LOW(-@0)
	SBCI R31,HIGH(-@0)
	LD   R31,Z
	CLR  R30
	.ENDM

	.MACRO __PUTB1SX
	MOV  R26,R28
	MOV  R27,R29
	SUBI R26,LOW(-@0)
	SBCI R27,HIGH(-@0)
	ST   X,R30
	.ENDM

	.MACRO __PUTW1SX
	MOV  R26,R28
	MOV  R27,R29
	SUBI R26,LOW(-@0)
	SBCI R27,HIGH(-@0)
	ST   X+,R30
	ST   X,R31
	.ENDM

	.MACRO __PUTD1SX
	MOV  R26,R28
	MOV  R27,R29
	SUBI R26,LOW(-@0)
	SBCI R27,HIGH(-@0)
	ST   X+,R30
	ST   X+,R31
	ST   X+,R22
	ST   X,R23
	.ENDM

	.MACRO __CLRW1SX
	MOV  R30,R28
	MOV  R31,R29
	SUBI R30,LOW(-@0)
	SBCI R31,HIGH(-@0)
	CLR  R0
	ST   Z+,R0
	ST   Z,R0
	.ENDM

	.MACRO __CLRD1SX
	MOV  R30,R28
	MOV  R31,R29
	SUBI R30,LOW(-@0)
	SBCI R31,HIGH(-@0)
	CLR  R0
	ST   Z+,R0
	ST   Z+,R0
	ST   Z+,R0
	ST   Z,R0
	.ENDM

	.MACRO __PUTB2SX
	MOV  R30,R28
	MOV  R31,R29
	SUBI R30,LOW(-@0)
	SBCI R31,HIGH(-@0)
	ST   Z,R26
	.ENDM

	.MACRO __PUTW2SX
	MOV  R30,R28
	MOV  R31,R29
	SUBI R30,LOW(-@0)
	SBCI R31,HIGH(-@0)
	ST   Z+,R26
	ST   Z,R27
	.ENDM

	.MACRO __PUTBSRX
	MOV  R30,R28
	MOV  R31,R29
	SUBI R30,LOW(-@0)
	SBCI R31,HIGH(-@0)
	ST   Z,R@1
	.ENDM

	.MACRO __PUTWSRX
	MOV  R30,R28
	MOV  R31,R29
	SUBI R30,LOW(-@2)
	SBCI R31,HIGH(-@2)
	ST   Z+,R@0
	ST   Z,R@1
	.ENDM

	.MACRO __PUTB1SNX
	MOV  R26,R28
	MOV  R27,R29
	SUBI R26,LOW(-@0)
	SBCI R27,HIGH(-@0)
	LD   R0,X+
	LD   R27,X
	MOV  R26,R0
	SUBI R26,LOW(-@1)
	SBCI R27,HIGH(-@1)
	ST   X,R30
	.ENDM

	.MACRO __PUTW1SNX
	MOV  R26,R28
	MOV  R27,R29
	SUBI R26,LOW(-@0)
	SBCI R27,HIGH(-@0)
	LD   R0,X+
	LD   R27,X
	MOV  R26,R0
	SUBI R26,LOW(-@1)
	SBCI R27,HIGH(-@1)
	ST   X+,R30
	ST   X,R31
	.ENDM

	.MACRO __PUTD1SNX
	MOV  R26,R28
	MOV  R27,R29
	SUBI R26,LOW(-@0)
	SBCI R27,HIGH(-@0)
	LD   R0,X+
	LD   R27,X
	MOV  R26,R0
	SUBI R26,LOW(-@1)
	SBCI R27,HIGH(-@1)
	ST   X+,R30
	ST   X+,R31
	ST   X+,R22
	ST   X,R23
	.ENDM

	.CSEG
	.ORG 0

	.INCLUDE "reco.vec"
	.INCLUDE "reco.inc"

__RESET:
	CLI
	CLR  R30
	OUT  EECR,R30
	OUT  MCUCR,R30

;DISABLE WATCHDOG
	LDI  R31,0x18
	OUT  WDTCR,R31
	LDI  R31,0x10
	OUT  WDTCR,R31

;CLEAR R2-R14
	LDI  R24,13
	LDI  R26,2
	CLR  R27
__CLEAR_REG:
	ST   X+,R30
	DEC  R24
	BRNE __CLEAR_REG

;CLEAR SRAM
	LDI  R24,LOW(0x200)
	LDI  R25,HIGH(0x200)
	LDI  R26,0x60
__CLEAR_SRAM:
	ST   X+,R30
	SBIW R24,1
	BRNE __CLEAR_SRAM

;GLOBAL VARIABLES INITIALIZATION
	LDI  R30,LOW(__GLOBAL_INI_TBL*2)
	LDI  R31,HIGH(__GLOBAL_INI_TBL*2)
__GLOBAL_INI_NEXT:
	LPM
	ADIW R30,1
	MOV  R1,R0
	LPM
	ADIW R30,1
	MOV  R22,R30
	MOV  R23,R31
	MOV  R31,R0
	MOV  R30,R1
	SBIW R30,0
	BREQ __GLOBAL_INI_END
	LPM
	ADIW R30,1
	MOV  R26,R0
	LPM
	ADIW R30,1
	MOV  R27,R0
	LPM
	ADIW R30,1
	MOV  R24,R0
	LPM
	ADIW R30,1
	MOV  R25,R0
__GLOBAL_INI_LOOP:
	LPM
	ADIW R30,1
	ST   X+,R0
	SBIW R24,1
	BRNE __GLOBAL_INI_LOOP
	MOV  R30,R22
	MOV  R31,R23
	RJMP __GLOBAL_INI_NEXT
__GLOBAL_INI_END:

;STACK POINTER INITIALIZATION
	LDI  R30,LOW(0x25F)
	OUT  SPL,R30
	LDI  R30,HIGH(0x25F)
	OUT  SPH,R30

;DATA STACK POINTER INITIALIZATION
	LDI  R28,LOW(0xE0)
	LDI  R29,HIGH(0xE0)

	RJMP _main

	.ESEG
	.ORG 0
	.DB  0 ; FIRST EEPROM LOCATION NOT USED, SEE ATMEL ERRATA SHEETS

	.DSEG
	.ORG 0xE0
;       1 //*************************************************************
;       2 //**		Titre: Reconnaissance Vocale                 **
;       3 //**		Noms: DavPichFabFab                          **
;       4 //**		Date: 22/01/2004                             **
;       5 //*************************************************************
;       6 
;       7 #include <90s8535.h>
;       8 #include <delay.h>
;       9 
;      10 // Seuils
;      11 #define  seuilclap_haut		700       // 3.4V
;      12 #define  seuilclap_bas		300       // 1,5V
;      13 #define  seuilinterclap_bas	350       // 1,7V
;      14 #define  Temps_clap_min		100       // 100ms
;      15 #define  Temps_clap_max		350       // 350ms
;      16 #define  Temps_interclap_min	100       // 100ms
;      17 #define  Temps_interclap_max	500       // 500ms
;      18 
;      19 // Ordres
;      20 #define fermer 0
;      21 #define ouvrir 1
;      22 
;      23 // Commandes du portail
;      24 #define Ouverture PORTB.0
;      25 #define Fermeture PORTB.1
;      26 
;      27 //sous programmes
;      28 unsigned char clap(void);
;      29 unsigned char interclap(void);
;      30 
;      31 // Variables globales
;      32 unsigned char Nb_Clap_interclap_Valide=0; // Compteur de clap suivi de interclap valides
;      33 
;      34 // Timer 1 overflow interrupt service routine
;      35 interrupt [TIM1_OVF] void timer1_ovf_isr(void)
;      36 {

	.CSEG
_timer1_ovf_isr:
	RCALL __SAVEISR
;      37 // Reinitialize Timer 1 value
;      38 TCCR1B=0x00; // Désactivation du timer 1
	RCALL SUBOPT_0x0
;      39 TCNT1H=0xE1; // Rechargement à la valeur initiale
;      40 TCNT1L=0x7C; // de 2s avant interruption
;      41 Nb_Clap_interclap_Valide = 0;
	CLR  R4
;      42 
;      43 }
	RCALL __LOADISR
	RETI
;      44                    
;      45 // Read the AD conversion result
;      46 unsigned int read_adc(unsigned char adc_input)
;      47 {
_read_adc:
;      48 ADMUX=adc_input;
	LD   R30,Y
	OUT  0x7,R30
;      49 // Start the AD conversion
;      50 ADCSR|=0x40;
	SBI  0x6,6
;      51 // Wait for the AD conversion to complete
;      52 while ((ADCSR & 0x10)==0);
_0x7:
	SBIS 0x6,4
	RJMP _0x7
;      53 ADCSR|=0x10;
	SBI  0x6,4
;      54 return ADCW;
	IN   R30,0x4
	IN   R31,0x4+1
	ADIW R28,1
	RET
;      55 }
;      56 
;      57 // Programme principal
;      58 void main(void)
;      59 {
_main:
;      60 //Variables locales		             type        Commentaires                         
;      61 unsigned char Clap_Valide=0;      	  // Booléen 	V = 1 si clap valide
;      62 unsigned char Interclap_Valide=0;      	  // Booléen 	W = 1 si interclap valide
;      63 unsigned char ordre_precedent = fermer;   // Booléen    réalise une bascule entre ouverture 
;      64 					  //            et fermeture  
;      65 
;      66 // Configuration du PortA en entrée
;      67 DDRA=0x00;
;	Clap_Valide -> R16
;	Interclap_Valide -> R17
;	ordre_precedent -> R18
	LDI  R16,0
	LDI  R17,0
	LDI  R18,0
	CLR  R30
	OUT  0x1A,R30
;      68 
;      69 // Configuration du PORTB en sortie					  
;      70 DDRB= 0x03; // bits 1 et 2 du PORTB en sortie
	LDI  R30,LOW(3)
	OUT  0x17,R30
;      71 
;      72 // ADC initialization
;      73 // ADC Clock frequency: 125,000 kHz
;      74 ADCSR=0x85;
	LDI  R30,LOW(133)
	OUT  0x6,R30
;      75 
;      76 // Timer/Counter 1 initialization
;      77 // Clock source: System Clock
;      78 // Clock value: 3,906 kHz
;      79 // Mode: Normal top=FFFFh
;      80 // OC1A output: Discon.
;      81 // OC1B output: Discon.
;      82 // Noise Canceler: Off
;      83 // Input Capture on Falling Edge
;      84 TCCR1A=0x00;
	CLR  R30
	OUT  0x2F,R30
;      85 TCCR1B=0x00;
	RCALL SUBOPT_0x0
;      86 TCNT1H=0xE1;
;      87 TCNT1L=0x7C;
;      88 OCR1AH=0x00;
	CLR  R30
	OUT  0x2B,R30
;      89 OCR1AL=0x00;
	OUT  0x2A,R30
;      90 OCR1BH=0x00;
	OUT  0x29,R30
;      91 OCR1BL=0x00;
	OUT  0x28,R30
;      92 
;      93 // Timer(s)/Counter(s) Interrupt(s) initialization
;      94 TIMSK=0x04;
	LDI  R30,LOW(4)
	OUT  0x39,R30
;      95 
;      96 #asm("sei");	     
	sei
;      97 					  
;      98 while (1)
_0xB:
;      99  {      				//debut prog princ
;     100  
;     101  do             	       		// Attente clap valide
_0xF:
;     102    Clap_Valide = clap();
	RCALL _clap
	MOV  R16,R30
;     103  while (Clap_Valide == 0);
	CPI  R16,0
	BREQ _0xF
;     104  
;     105  Clap_Valide = 0;
	LDI  R16,LOW(0)
;     106  Interclap_Valide = interclap();	// Mesure interclap	
	RCALL _interclap
	MOV  R17,R30
;     107  
;     108  if (Interclap_Valide==1)      		// Si interclap valide
	CPI  R17,1
	BRNE _0x11
;     109    {
;     110     Nb_Clap_interclap_Valide = Nb_Clap_interclap_Valide + 1;    // Compter le nombre de claps suivis d'interclaps
	INC  R4
;     111     if (Nb_Clap_interclap_Valide == 1) 
	RCALL SUBOPT_0x1
	BRNE _0x12
;     112     	{
;     113 	 TCCR1B=0x05; // Activation du timer 1, RAZ Nb_Clap_interclap_Valide si les suivants arrivent en plus de 2s
	LDI  R30,LOW(5)
	OUT  0x2E,R30
;     114 	}
;     115     if ((Nb_Clap_interclap_Valide==2)&&(ordre_precedent == ouvrir))   // Si égal à 3 => ordre de fermeture pendant 1s
_0x12:
	LDI  R30,LOW(2)
	CP   R30,R4
	BRNE _0x14
	CPI  R18,1
	BREQ _0x15
_0x14:
	RJMP _0x13
_0x15:
;     116     	{
;     117          TCCR1B=0x00; // Désactivation du timer 1
	RCALL SUBOPT_0x0
;     118          TCNT1H=0xE1; // Rechargement à la valeur initiale
;     119 	 TCNT1L=0x7C; // de 2s avant interruption
;     120 
;     121     	 Fermeture=1;
	SBI  0x18,1
;     122     	 delay_ms(1000);
	RCALL SUBOPT_0x2
;     123     	 Nb_Clap_interclap_Valide=0;
;     124     	 Fermeture=0;
	CBI  0x18,1
;     125     	 ordre_precedent = fermer;
	LDI  R18,LOW(0)
;     126     	}
;     127     	else if ((Nb_Clap_interclap_Valide==1)&& (ordre_precedent == fermer)) // Si égal à 2 => ordre d'ouverture pendant 1s
	RJMP _0x16
_0x13:
	RCALL SUBOPT_0x1
	BRNE _0x18
	CPI  R18,0
	BREQ _0x19
_0x18:
	RJMP _0x17
_0x19:
;     128     	{
;     129 	 TCCR1B=0x00; // Désactivation du timer 1
	RCALL SUBOPT_0x0
;     130          TCNT1H=0xE1; // Rechargement à la valeur initiale
;     131 	 TCNT1L=0x7C; // de 2s avant interruption
;     132 
;     133     	 Ouverture=1;
	SBI  0x18,0
;     134          delay_ms(1000);
	RCALL SUBOPT_0x2
;     135     	 Nb_Clap_interclap_Valide=0;
;     136     	 Ouverture=0;
	CBI  0x18,0
;     137     	 ordre_precedent = ouvrir;
	LDI  R18,LOW(1)
;     138 
;     139     	}            // Sinon (1 seul clap) => attente clap(s) suivant(s) pendant au + 2s
;     140     }
_0x17:
_0x16:
;     141  else 
	RJMP _0x1A
_0x11:
;     142    {
;     143      Nb_Clap_interclap_Valide = 0;
	CLR  R4
;     144      Interclap_Valide = 0;
	LDI  R17,LOW(0)
;     145    }
_0x1A:
;     146 
;     147  }// Fin du while
	RJMP _0xB
;     148 
;     149 }//Fin du main
_0x1B:
	RJMP _0x1B
;     150 
;     151 
;     152 unsigned char clap(void)
;     153 {
_clap:
;     154 unsigned int signal, Temps_clap=0;
;     155 
;     156 signal=read_adc(7); // détection début clap
	RCALL __SAVELOCR4
;	signal -> R16,R17
;	Temps_clap -> R18,R19
	LDI  R18,0
	LDI  R19,0
	RCALL SUBOPT_0x3
;     157 if (signal > seuilclap_haut)
	LDI  R30,LOW(700)
	LDI  R31,HIGH(700)
	CP   R30,R16
	CPC  R31,R17
	BRSH _0x1D
;     158 { 
;     159   do 				// Mesure de la largeur du clap
_0x1F:
;     160    {
;     161     delay_ms(1);
	RCALL SUBOPT_0x4
;     162     Temps_clap = Temps_clap + 1;
	__ADDWRN 18,19,1
;     163     signal=read_adc(7);
	RCALL SUBOPT_0x3
;     164    }
;     165   while ((signal > seuilclap_bas) && (Temps_clap < Temps_clap_max));
	LDI  R30,LOW(300)
	LDI  R31,HIGH(300)
	CP   R30,R16
	CPC  R31,R17
	BRSH _0x21
	__CPWRN 18,19,350
	BRLO _0x22
_0x21:
	RJMP _0x20
_0x22:
	RJMP _0x1F
_0x20:
;     166   if ((signal < seuilclap_bas) && (Temps_clap > Temps_clap_min) && (Temps_clap < Temps_clap_max)) return 1;
	__CPWRN 16,17,300
	BRSH _0x24
	RCALL SUBOPT_0x5
	BRSH _0x24
	__CPWRN 18,19,350
	BRLO _0x25
_0x24:
	RJMP _0x23
_0x25:
	LDI  R30,LOW(1)
	RJMP _0x31
;     167   		else return 0;
_0x23:
	CLR  R30
	RJMP _0x31
;     168 }
;     169 return 0;
_0x1D:
	CLR  R30
	RJMP _0x31
;     170 }
;     171 
;     172 unsigned char interclap(void)
;     173 {
_interclap:
;     174 unsigned int signal, Temps_interclap=0;
;     175 
;     176   do				// Mesure de la largeur de l'interclap
	RCALL __SAVELOCR4
;	signal -> R16,R17
;	Temps_interclap -> R18,R19
	LDI  R18,0
	LDI  R19,0
_0x29:
;     177    { 
;     178     delay_ms(1);
	RCALL SUBOPT_0x4
;     179     Temps_interclap = Temps_interclap + 1;
	__ADDWRN 18,19,1
;     180     signal=read_adc(7);
	RCALL SUBOPT_0x3
;     181    }
;     182   while ((signal < seuilinterclap_bas) && (Temps_interclap < Temps_interclap_max));
	__CPWRN 16,17,350
	BRSH _0x2B
	__CPWRN 18,19,500
	BRLO _0x2C
_0x2B:
	RJMP _0x2A
_0x2C:
	RJMP _0x29
_0x2A:
;     183   if ((signal > seuilinterclap_bas) && (Temps_interclap > Temps_interclap_min) && (Temps_interclap < Temps_clap_max)) return 1;
	LDI  R30,LOW(350)
	LDI  R31,HIGH(350)
	CP   R30,R16
	CPC  R31,R17
	BRSH _0x2E
	RCALL SUBOPT_0x5
	BRSH _0x2E
	__CPWRN 18,19,350
	BRLO _0x2F
_0x2E:
	RJMP _0x2D
_0x2F:
	LDI  R30,LOW(1)
	RJMP _0x31
;     184   		else return 0;
_0x2D:
	CLR  R30
;     185 
;     186 
;     187 }
_0x31:
	RCALL __LOADLOCR4
	ADIW R28,4
	RET

;OPTIMIZER ADDED SUBROUTINE, CALLED 4 TIMES
SUBOPT_0x0:
	CLR  R30
	OUT  0x2E,R30
	LDI  R30,LOW(225)
	OUT  0x2D,R30
	LDI  R30,LOW(124)
	OUT  0x2C,R30
	RET

;OPTIMIZER ADDED SUBROUTINE, CALLED 2 TIMES
SUBOPT_0x1:
	LDI  R30,LOW(1)
	CP   R30,R4
	RET

;OPTIMIZER ADDED SUBROUTINE, CALLED 2 TIMES
SUBOPT_0x2:
	LDI  R30,LOW(1000)
	LDI  R31,HIGH(1000)
	ST   -Y,R31
	ST   -Y,R30
	RCALL _delay_ms
	CLR  R4
	RET

;OPTIMIZER ADDED SUBROUTINE, CALLED 3 TIMES
SUBOPT_0x3:
	LDI  R30,LOW(7)
	ST   -Y,R30
	RCALL _read_adc
	__PUTW1R 16,17
	RET

;OPTIMIZER ADDED SUBROUTINE, CALLED 2 TIMES
SUBOPT_0x4:
	LDI  R30,LOW(1)
	LDI  R31,HIGH(1)
	ST   -Y,R31
	ST   -Y,R30
	RJMP _delay_ms

;OPTIMIZER ADDED SUBROUTINE, CALLED 2 TIMES
SUBOPT_0x5:
	LDI  R30,LOW(100)
	LDI  R31,HIGH(100)
	CP   R30,R18
	CPC  R31,R19
	RET

_delay_ms:
	ld   r30,y+
	ld   r31,y+
	adiw r30,0
	breq __delay_ms1
__delay_ms0:
	__DELAY_USW 0x3E8
	wdr
	sbiw r30,1
	brne __delay_ms0
__delay_ms1:
	ret

__SAVEISR:
	ST   -Y,R0
	ST   -Y,R1
	ST   -Y,R15
	ST   -Y,R22
	ST   -Y,R23
	ST   -Y,R24
	ST   -Y,R25
	ST   -Y,R26
	ST   -Y,R27
	ST   -Y,R30
	ST   -Y,R31
	IN   R0,SREG
	ST   -Y,R0
	RET

__LOADISR:
	LD   R0,Y+
	OUT  SREG,R0
	LD   R31,Y+
	LD   R30,Y+
	LD   R27,Y+
	LD   R26,Y+
	LD   R25,Y+
	LD   R24,Y+
	LD   R23,Y+
	LD   R22,Y+
	LD   R15,Y+
	LD   R1,Y+
	LD   R0,Y+
	RET

__SAVELOCR4:
	ST   -Y,R19
__SAVELOCR3:
	ST   -Y,R18
__SAVELOCR2:
	ST   -Y,R17
	ST   -Y,R16
	RET

__LOADLOCR4:
	LDD  R19,Y+3
__LOADLOCR3:
	LDD  R18,Y+2
__LOADLOCR2:
	LDD  R17,Y+1
	LD   R16,Y
	RET

