;CodeVisionAVR C Compiler V1.0.2.2d Standard
;(C) Copyright 1998-2002 Pavel Haiduc, HP InfoTech s.r.l.
;http://www.hpinfotech.ro
;e-mail:office@hpinfotech.ro , hpinfotech@xmail.ro

;Chip type           : AT90S8535
;Clock frequency     : 4,000000 MHz
;Memory model        : Small
;Optimize for        : Size
;Internal SRAM size  : 512
;External SRAM size  : 0
;Data Stack size     : 128
;Promote char to int : No
;char is unsigned    : Yes
;Automatic register allocation : On
;Use AVR Studio Terminal I/O   : No

	.DEVICE AT90S8535
	.LISTMAC
	.EQU UDRE=0x5
	.EQU RXC=0x7
	.EQU USR=0xB
	.EQU UDR=0xC
	.EQU EERE=0x0
	.EQU EEWE=0x1
	.EQU EEMWE=0x2
	.EQU SPSR=0xE
	.EQU SPDR=0xF
	.EQU EECR=0x1C
	.EQU EEDR=0x1D
	.EQU EEARL=0x1E
	.EQU EEARH=0x1F
	.EQU WDTCR=0x21
	.EQU MCUCR=0x35
	.EQU RAMPZ=0x3B
	.EQU SPL=0x3D
	.EQU SPH=0x3E
	.EQU SREG=0x3F
	.DEF R0X0=R0
	.DEF R0X1=R1
	.DEF R0X2=R2
	.DEF R0X3=R3
	.DEF R0X4=R4
	.DEF R0X5=R5
	.DEF R0X6=R6
	.DEF R0X7=R7
	.DEF R0X8=R8
	.DEF R0X9=R9
	.DEF R0XA=R10
	.DEF R0XB=R11
	.DEF R0XC=R12
	.DEF R0XD=R13
	.DEF R0XE=R14
	.DEF R0XF=R15
	.DEF R0X10=R16
	.DEF R0X11=R17
	.DEF R0X12=R18
	.DEF R0X13=R19
	.DEF R0X14=R20
	.DEF R0X15=R21
	.DEF R0X16=R22
	.DEF R0X17=R23
	.DEF R0X18=R24
	.DEF R0X19=R25
	.DEF R0X1A=R26
	.DEF R0X1B=R27
	.DEF R0X1C=R28
	.DEF R0X1D=R29
	.DEF R0X1E=R30
	.DEF R0X1F=R31
	.EQU __se_bit=0x40
	.EQU __sm_mask=0x30
	.EQU __sm_powerdown=0x20

	.MACRO __CPD1N
	CPI  R30,LOW(@0)
	LDI  R26,HIGH(@0)
	CPC  R31,R26
	LDI  R26,BYTE3(@0)
	CPC  R22,R26
	LDI  R26,BYTE4(@0)
	CPC  R23,R26
	.ENDM

	.MACRO __CPD2N
	CPI  R26,LOW(@0)
	LDI  R30,HIGH(@0)
	CPC  R27,R30
	LDI  R30,BYTE3(@0)
	CPC  R24,R30
	LDI  R30,BYTE4(@0)
	CPC  R25,R30
	.ENDM

	.MACRO __CPWRR
	CP   R@0,R@2
	CPC  R@1,R@3
	.ENDM

	.MACRO __CPWRN
	CPI  R@0,LOW(@2)
	LDI  R30,HIGH(@2)
	CPC  R@1,R30
	.ENDM

	.MACRO __ADDD1N
	SUBI R30,LOW(-@0)
	SBCI R31,HIGH(-@0)
	SBCI R22,BYTE3(-@0)
	SBCI R23,BYTE4(-@0)
	.ENDM

	.MACRO __ADDD2N
	SUBI R26,LOW(-@0)
	SBCI R27,HIGH(-@0)
	SBCI R24,BYTE3(-@0)
	SBCI R25,BYTE4(-@0)
	.ENDM

	.MACRO __SUBD1N
	SUBI R30,LOW(@0)
	SBCI R31,HIGH(@0)
	SBCI R22,BYTE3(@0)
	SBCI R23,BYTE4(@0)
	.ENDM

	.MACRO __SUBD2N
	SUBI R26,LOW(@0)
	SBCI R27,HIGH(@0)
	SBCI R24,BYTE3(@0)
	SBCI R25,BYTE4(@0)
	.ENDM

	.MACRO __ANDD1N
	ANDI R30,LOW(@0)
	ANDI R31,HIGH(@0)
	ANDI R22,BYTE3(@0)
	ANDI R23,BYTE4(@0)
	.ENDM

	.MACRO __ORD1N
	ORI  R30,LOW(@0)
	ORI  R31,HIGH(@0)
	ORI  R22,BYTE3(@0)
	ORI  R23,BYTE4(@0)
	.ENDM

	.MACRO __DELAY_USB
	LDI  R24,LOW(@0)
__DELAY_USB_LOOP:
	DEC  R24
	BRNE __DELAY_USB_LOOP
	.ENDM

	.MACRO __DELAY_USW
	LDI  R24,LOW(@0)
	LDI  R25,HIGH(@0)
__DELAY_USW_LOOP:
	SBIW R24,1
	BRNE __DELAY_USW_LOOP
	.ENDM

	.MACRO __CLRD1S
	CLR  R30
	STD  Y+@0,R30
	STD  Y+@0+1,R30
	STD  Y+@0+2,R30
	STD  Y+@0+3,R30
	.ENDM

	.MACRO __GETD1S
	LDD  R30,Y+@0
	LDD  R31,Y+@0+1
	LDD  R22,Y+@0+2
	LDD  R23,Y+@0+3
	.ENDM

	.MACRO __PUTD1S
	STD  Y+@0,R30
	STD  Y+@0+1,R31
	STD  Y+@0+2,R22
	STD  Y+@0+3,R23
	.ENDM

	.MACRO __POINTB1MN
	LDI  R30,LOW(@0+@1)
	.ENDM

	.MACRO __POINTW1MN
	LDI  R30,LOW(@0+@1)
	LDI  R31,HIGH(@0+@1)
	.ENDM

	.MACRO __POINTW1FN
	LDI  R30,LOW(2*@0+@1)
	LDI  R31,HIGH(2*@0+@1)
	.ENDM

	.MACRO __POINTB2MN
	LDI  R26,LOW(@0+@1)
	.ENDM

	.MACRO __POINTW2MN
	LDI  R26,LOW(@0+@1)
	LDI  R27,HIGH(@0+@1)
	.ENDM

	.MACRO __GETD1N
	LDI  R30,LOW(@0)
	LDI  R31,HIGH(@0)
	LDI  R22,BYTE3(@0)
	LDI  R23,BYTE4(@0)
	.ENDM

	.MACRO __GETD2N
	LDI  R26,LOW(@0)
	LDI  R27,HIGH(@0)
	LDI  R24,BYTE3(@0)
	LDI  R25,BYTE4(@0)
	.ENDM

	.MACRO __GETD2S
	LDD  R26,Y+@0
	LDD  R27,Y+@0+1
	LDD  R24,Y+@0+2
	LDD  R25,Y+@0+3
	.ENDM

	.MACRO __GETB1MN
	LDS  R30,@0+@1
	.ENDM

	.MACRO __GETW1MN
	LDS  R30,@0+@1
	LDS  R31,@0+@1+1
	.ENDM

	.MACRO __GETD1MN
	LDS  R30,@0+@1
	LDS  R31,@0+@1+1
	LDS  R22,@0+@1+2
	LDS  R23,@0+@1+3
	.ENDM

	.MACRO __GETBRMN
	LDS  R@2,@0+@1
	.ENDM

	.MACRO __GETWRMN
	LDS  R@2,@0+@1
	LDS  R@3,@0+@1+1
	.ENDM

	.MACRO __GETB2MN
	LDS  R26,@0+@1
	.ENDM

	.MACRO __GETW2MN
	LDS  R26,@0+@1
	LDS  R27,@0+@1+1
	.ENDM

	.MACRO __GETD2MN
	LDS  R26,@0+@1
	LDS  R27,@0+@1+1
	LDS  R24,@0+@1+2
	LDS  R25,@0+@1+3
	.ENDM

	.MACRO __PUTB1MN
	STS  @0+@1,R30
	.ENDM

	.MACRO __PUTW1MN
	STS  @0+@1,R30
	STS  @0+@1+1,R31
	.ENDM

	.MACRO __PUTD1MN
	STS  @0+@1,R30
	STS  @0+@1+1,R31
	STS  @0+@1+2,R22
	STS  @0+@1+3,R23
	.ENDM

	.MACRO __PUTBMRN
	STS  @0+@1,R@2
	.ENDM

	.MACRO __PUTWMRN
	STS  @0+@1,R@2
	STS  @0+@1+1,R@3
	.ENDM

	.MACRO __GETW1R
	MOV  R30,R@0
	MOV  R31,R@1
	.ENDM

	.MACRO __GETW2R
	MOV  R26,R@0
	MOV  R27,R@1
	.ENDM

	.MACRO __GETWRN
	LDI  R@0,LOW(@2)
	LDI  R@1,HIGH(@2)
	.ENDM

	.MACRO __PUTW1R
	MOV  R@0,R30
	MOV  R@1,R31
	.ENDM

	.MACRO __ADDWRN
	SUBI R@0,LOW(-@2)
	SBCI R@1,HIGH(-@2)
	.ENDM

	.MACRO __ADDWRR
	ADD  R@0,R@2
	ADC  R@1,R@3
	.ENDM

	.MACRO __SUBWRN
	SUBI R@0,LOW(@2)
	SBCI R@1,HIGH(@2)
	.ENDM

	.MACRO __SUBWRR
	SUB  R@0,R@2
	SBC  R@1,R@3
	.ENDM

	.MACRO __ANDWRN
	ANDI R@0,LOW(@2)
	ANDI R@1,HIGH(@2)
	.ENDM

	.MACRO __ANDWRR
	AND  R@0,R@2
	AND  R@1,R@3
	.ENDM

	.MACRO __ORWRN
	ORI  R@0,LOW(@2)
	ORI  R@1,HIGH(@2)
	.ENDM

	.MACRO __ORWRR
	OR   R@0,R@2
	OR   R@1,R@3
	.ENDM

	.MACRO __EORWRR
	EOR  R@0,R@2
	EOR  R@1,R@3
	.ENDM

	.MACRO __GETWRS
	LDD  R@0,Y+@2
	LDD  R@1,Y+@2+1
	.ENDM

	.MACRO __PUTWSR
	STD  Y+@2,R@0
	STD  Y+@2+1,R@1
	.ENDM

	.MACRO __MOVEWRR
	MOV  R@0,R@2
	MOV  R@1,R@3
	.ENDM

	.MACRO __INWR
	IN   R@0,@2
	IN   R@1,@2+1
	.ENDM

	.MACRO __OUTWR
	OUT  @2+1,R@1
	OUT  @2,R@0
	.ENDM

	.MACRO __CALL1MN
	LDS  R30,@0+@1
	LDS  R31,@0+@1+1
	ICALL
	.ENDM

	.MACRO __NBST
	BST  R@0,@1
	IN   R30,SREG
	LDI  R31,0x40
	EOR  R30,R31
	OUT  SREG,R30
	.ENDM


	.MACRO __PUTB1SN
	LDD  R26,Y+@0
	LDD  R27,Y+@0+1
	SUBI R26,LOW(-@1)
	SBCI R27,HIGH(-@1)
	ST   X,R30
	.ENDM

	.MACRO __PUTW1SN
	LDD  R26,Y+@0
	LDD  R27,Y+@0+1
	SUBI R26,LOW(-@1)
	SBCI R27,HIGH(-@1)
	ST   X+,R30
	ST   X,R31
	.ENDM

	.MACRO __PUTD1SN
	LDD  R26,Y+@0
	LDD  R27,Y+@0+1
	SUBI R26,LOW(-@1)
	SBCI R27,HIGH(-@1)
	RCALL __PUTDP1
	.ENDM

	.MACRO __PUTB1SNS
	LDD  R26,Y+@0
	LDD  R27,Y+@0+1
	ADIW R26,@1
	ST   X,R30
	.ENDM

	.MACRO __PUTW1SNS
	LDD  R26,Y+@0
	LDD  R27,Y+@0+1
	ADIW R26,@1
	ST   X+,R30
	ST   X,R31
	.ENDM

	.MACRO __PUTD1SNS
	LDD  R26,Y+@0
	LDD  R27,Y+@0+1
	ADIW R26,@1
	RCALL __PUTDP1
	.ENDM

	.MACRO __PUTB1PMN
	LDS  R26,@0
	LDS  R27,@0+1
	SUBI R26,LOW(-@1)
	SBCI R27,HIGH(-@1)
	ST   X,R30
	.ENDM

	.MACRO __PUTW1PMN
	LDS  R26,@0
	LDS  R27,@0+1
	SUBI R26,LOW(-@1)
	SBCI R27,HIGH(-@1)
	ST   X+,R30
	ST   X,R31
	.ENDM

	.MACRO __PUTD1PMN
	LDS  R26,@0
	LDS  R27,@0+1
	SUBI R26,LOW(-@1)
	SBCI R27,HIGH(-@1)
	RCALL __PUTDP1
	.ENDM

	.MACRO __PUTB1PMNS
	LDS  R26,@0
	LDS  R27,@0+1
	ADIW R26,@1
	ST   X,R30
	.ENDM

	.MACRO __PUTW1PMNS
	LDS  R26,@0
	LDS  R27,@0+1
	ADIW R26,@1
	ST   X+,R30
	ST   X,R31
	.ENDM

	.MACRO __PUTD1PMNS
	LDS  R26,@0
	LDS  R27,@0+1
	ADIW R26,@1
	RCALL __PUTDP1
	.ENDM

	.MACRO __GETB1SX
	MOV  R30,R28
	MOV  R31,R29
	SUBI R30,LOW(-@0)
	SBCI R31,HIGH(-@0)
	LD   R30,Z
	.ENDM

	.MACRO __GETW1SX
	MOV  R30,R28
	MOV  R31,R29
	SUBI R30,LOW(-@0)
	SBCI R31,HIGH(-@0)
	LD   R0,Z+
	LD   R31,Z
	MOV  R30,R0
	.ENDM

	.MACRO __GETD1SX
	MOV  R30,R28
	MOV  R31,R29
	SUBI R30,LOW(-@0)
	SBCI R31,HIGH(-@0)
	LD   R0,Z+
	LD   R1,Z+
	LD   R22,Z+
	LD   R23,Z
	MOV  R30,R0
	MOV  R31,R1
	.ENDM

	.MACRO __GETB2SX
	MOV  R26,R28
	MOV  R27,R29
	SUBI R26,LOW(-@0)
	SBCI R27,HIGH(-@0)
	LD   R26,X
	.ENDM

	.MACRO __GETW2SX
	MOV  R26,R28
	MOV  R27,R29
	SUBI R26,LOW(-@0)
	SBCI R27,HIGH(-@0)
	LD   R0,X+
	LD   R27,X
	MOV  R26,R0
	.ENDM

	.MACRO __GETD2SX
	MOV  R26,R28
	MOV  R27,R29
	SUBI R26,LOW(-@0)
	SBCI R27,HIGH(-@0)
	LD   R0,X+
	LD   R1,X+
	LD   R24,X+
	LD   R25,X
	MOV  R26,R0
	MOV  R27,R1
	.ENDM

	.MACRO __GETBRSX
	MOV  R30,R28
	MOV  R31,R29
	SUBI R30,LOW(-@1)
	SBCI R31,HIGH(-@1)
	LD   R@0,Z
	.ENDM

	.MACRO __GETWRSX
	MOV  R30,R28
	MOV  R31,R29
	SUBI R30,LOW(-@2)
	SBCI R31,HIGH(-@2)
	LD   R@0,Z+
	LD   R@1,Z
	.ENDM

	.MACRO __LSLW8SX
	MOV  R30,R28
	MOV  R31,R29
	SUBI R30,LOW(-@0)
	SBCI R31,HIGH(-@0)
	LD   R31,Z
	CLR  R30
	.ENDM

	.MACRO __PUTB1SX
	MOV  R26,R28
	MOV  R27,R29
	SUBI R26,LOW(-@0)
	SBCI R27,HIGH(-@0)
	ST   X,R30
	.ENDM

	.MACRO __PUTW1SX
	MOV  R26,R28
	MOV  R27,R29
	SUBI R26,LOW(-@0)
	SBCI R27,HIGH(-@0)
	ST   X+,R30
	ST   X,R31
	.ENDM

	.MACRO __PUTD1SX
	MOV  R26,R28
	MOV  R27,R29
	SUBI R26,LOW(-@0)
	SBCI R27,HIGH(-@0)
	ST   X+,R30
	ST   X+,R31
	ST   X+,R22
	ST   X,R23
	.ENDM

	.MACRO __CLRW1SX
	MOV  R30,R28
	MOV  R31,R29
	SUBI R30,LOW(-@0)
	SBCI R31,HIGH(-@0)
	CLR  R0
	ST   Z+,R0
	ST   Z,R0
	.ENDM

	.MACRO __CLRD1SX
	MOV  R30,R28
	MOV  R31,R29
	SUBI R30,LOW(-@0)
	SBCI R31,HIGH(-@0)
	CLR  R0
	ST   Z+,R0
	ST   Z+,R0
	ST   Z+,R0
	ST   Z,R0
	.ENDM

	.MACRO __PUTB2SX
	MOV  R30,R28
	MOV  R31,R29
	SUBI R30,LOW(-@0)
	SBCI R31,HIGH(-@0)
	ST   Z,R26
	.ENDM

	.MACRO __PUTW2SX
	MOV  R30,R28
	MOV  R31,R29
	SUBI R30,LOW(-@0)
	SBCI R31,HIGH(-@0)
	ST   Z+,R26
	ST   Z,R27
	.ENDM

	.MACRO __PUTBSRX
	MOV  R30,R28
	MOV  R31,R29
	SUBI R30,LOW(-@0)
	SBCI R31,HIGH(-@0)
	ST   Z,R@1
	.ENDM

	.MACRO __PUTWSRX
	MOV  R30,R28
	MOV  R31,R29
	SUBI R30,LOW(-@2)
	SBCI R31,HIGH(-@2)
	ST   Z+,R@0
	ST   Z,R@1
	.ENDM

	.MACRO __PUTB1SNX
	MOV  R26,R28
	MOV  R27,R29
	SUBI R26,LOW(-@0)
	SBCI R27,HIGH(-@0)
	LD   R0,X+
	LD   R27,X
	MOV  R26,R0
	SUBI R26,LOW(-@1)
	SBCI R27,HIGH(-@1)
	ST   X,R30
	.ENDM

	.MACRO __PUTW1SNX
	MOV  R26,R28
	MOV  R27,R29
	SUBI R26,LOW(-@0)
	SBCI R27,HIGH(-@0)
	LD   R0,X+
	LD   R27,X
	MOV  R26,R0
	SUBI R26,LOW(-@1)
	SBCI R27,HIGH(-@1)
	ST   X+,R30
	ST   X,R31
	.ENDM

	.MACRO __PUTD1SNX
	MOV  R26,R28
	MOV  R27,R29
	SUBI R26,LOW(-@0)
	SBCI R27,HIGH(-@0)
	LD   R0,X+
	LD   R27,X
	MOV  R26,R0
	SUBI R26,LOW(-@1)
	SBCI R27,HIGH(-@1)
	ST   X+,R30
	ST   X+,R31
	ST   X+,R22
	ST   X,R23
	.ENDM

	.CSEG
	.ORG 0x11

	.INCLUDE "ppe_morse.inc"

__RESET:
	CLI
	CLR  R30
	OUT  EECR,R30
	OUT  MCUCR,R30

;DISABLE WATCHDOG
	LDI  R31,0x18
	OUT  WDTCR,R31
	LDI  R31,0x10
	OUT  WDTCR,R31

;CLEAR R2-R15
	LDI  R24,14
	LDI  R26,2
	CLR  R27
__CLEAR_REG:
	ST   X+,R30
	DEC  R24
	BRNE __CLEAR_REG

;CLEAR SRAM
	LDI  R24,LOW(0x200)
	LDI  R25,HIGH(0x200)
	LDI  R26,0x60
__CLEAR_SRAM:
	ST   X+,R30
	SBIW R24,1
	BRNE __CLEAR_SRAM

;GLOBAL VARIABLES INITIALIZATION
	LDI  R30,LOW(__GLOBAL_INI_TBL*2)
	LDI  R31,HIGH(__GLOBAL_INI_TBL*2)
__GLOBAL_INI_NEXT:
	LPM
	ADIW R30,1
	MOV  R1,R0
	LPM
	ADIW R30,1
	MOV  R22,R30
	MOV  R23,R31
	MOV  R31,R0
	MOV  R30,R1
	SBIW R30,0
	BREQ __GLOBAL_INI_END
	LPM
	ADIW R30,1
	MOV  R26,R0
	LPM
	ADIW R30,1
	MOV  R27,R0
	LPM
	ADIW R30,1
	MOV  R24,R0
	LPM
	ADIW R30,1
	MOV  R25,R0
__GLOBAL_INI_LOOP:
	LPM
	ADIW R30,1
	ST   X+,R0
	SBIW R24,1
	BRNE __GLOBAL_INI_LOOP
	MOV  R30,R22
	MOV  R31,R23
	RJMP __GLOBAL_INI_NEXT
__GLOBAL_INI_END:

;STACK POINTER INITIALIZATION
	LDI  R30,LOW(0x25F)
	OUT  SPL,R30
	LDI  R30,HIGH(0x25F)
	OUT  SPH,R30

;DATA STACK POINTER INITIALIZATION
	LDI  R28,LOW(0xDF)
	LDI  R29,HIGH(0xDF)

	RJMP _main

	.ESEG
	.ORG 1

	.DSEG
	.ORG 0xE0
;       1 /*********************************************
;       2 This program was produced by the
;       3 CodeWizardAVR V1.23.7a Light
;       4 Automatic Program Generator
;       5 © Copyright 1998-2002 HP InfoTech s.r.l.
;       6 http://www.hpinfotech.ro
;       7 e-mail:office@hpinfotech.ro
;       8 
;       9 Project : PPE COMMUNICATION EN MORSE
;      10 Version : 1
;      11 Date    : 24/02/2003
;      12 Author  : Philippe MARIANO
;      13 Company : Lycee Pierre Emile MARTIN, Bourges
;      14 Comments: Acquisition d'une touche sur un clavier de PC et 
;      15           affichage du caractère correspondant sur un afficheur LCD
;      16 
;      17 Chip type           : AT90S8535
;      18 Clock frequency     : 4,000000 MHz
;      19 Memory model        : Small
;      20 Internal SRAM size  : 512
;      21 External SRAM size  : 0
;      22 Data Stack size     : 128
;      23 *********************************************/
;      24 
;      25 #include <90s8535.h>
;      26 // CodeVisionAVR C Compiler
;      27 // (C) 1998-2000 Pavel Haiduc, HP InfoTech S.R.L.
;      28 
;      29 // I/O registers definitions for the AT90S8535
;      30 
;      31 #ifndef _90S8535_INCLUDED_
;      32 #define _90S8535_INCLUDED_
;      33 
;      34 #pragma used+
;      35 sfrb ADCL=4;
;      36 sfrb ADCH=5;
;      37 sfrw ADCW=4;      // 16 bit access
;      38 sfrb ADCSR=6;
;      39 sfrb ADMUX=7;
;      40 sfrb ACSR=8;
;      41 sfrb UBRR=9;
;      42 sfrb UCR=0xa;
;      43 sfrb USR=0xb;
;      44 sfrb UDR=0xc;
;      45 sfrb SPCR=0xd;
;      46 sfrb SPSR=0xe;
;      47 sfrb SPDR=0xf;
;      48 sfrb PIND=0x10;
;      49 sfrb DDRD=0x11;
;      50 sfrb PORTD=0x12;
;      51 sfrb PINC=0x13;
;      52 sfrb DDRC=0x14;
;      53 sfrb PORTC=0x15;
;      54 sfrb PINB=0x16;
;      55 sfrb DDRB=0x17;
;      56 sfrb PORTB=0x18;
;      57 sfrb PINA=0x19;
;      58 sfrb DDRA=0x1a;
;      59 sfrb PORTA=0x1b;
;      60 sfrb EECR=0x1c;
;      61 sfrb EEDR=0x1d;
;      62 sfrb EEARL=0x1e;
;      63 sfrb EEARH=0x1f;
;      64 sfrw EEAR=0x1e;   // 16 bit access
;      65 sfrb WDTCR=0x21;
;      66 sfrb ASSR=0x22;
;      67 sfrb OCR2=0x23;
;      68 sfrb TCNT2=0x24;
;      69 sfrb TCCR2=0x25;
;      70 sfrb ICR1L=0x26;
;      71 sfrb ICR1H=0x27;
;      72 sfrw ICR1=0x26;   // 16 bit access
;      73 sfrb OCR1BL=0x28;
;      74 sfrb OCR1BH=0x29;
;      75 sfrw OCR1B=0x28;  // 16 bit access
;      76 sfrb OCR1AL=0x2a;
;      77 sfrb OCR1AH=0x2b;
;      78 sfrw OCR1A=0x2a;  // 16 bit access
;      79 sfrb TCNT1L=0x2c;
;      80 sfrb TCNT1H=0x2d;
;      81 sfrw TCNT1=0x2c;  // 16 bit access
;      82 sfrb TCCR1B=0x2e;
;      83 sfrb TCCR1A=0x2f;
;      84 sfrb TCNT0=0x32;
;      85 sfrb TCCR0=0x33;
;      86 sfrb MCUSR=0x34;
;      87 sfrb MCUCR=0x35;
;      88 sfrb TIFR=0x38;
;      89 sfrb TIMSK=0x39;
;      90 sfrb GIFR=0x3a;
;      91 sfrb GIMSK=0x3b;
;      92 sfrb SPL=0x3d;
;      93 sfrb SPH=0x3e;
;      94 sfrb SREG=0x3f;
;      95 #pragma used-
;      96 
;      97 // Interrupt vectors definitions
;      98 
;      99 #define EXT_INT0 2
;     100 #define EXT_INT1 3
;     101 #define TIM2_COMP 4
;     102 #define TIM2_OVF 5
;     103 #define TIM1_CAPT 6
;     104 #define TIM1_COMPA 7
;     105 #define TIM1_COMPB 8
;     106 #define TIM1_OVF 9
;     107 #define TIM0_OVF 10
;     108 #define SPI_STC 11
;     109 #define UART_RXC 12
;     110 #define UART_DRE 13
;     111 #define UART_TXC 14
;     112 #define ADC_INT 15
;     113 #define EE_RDY 16
;     114 #define ANA_COMP 17
;     115 
;     116 #endif
;     117 
;     118 #include <Scancode2.h>
;     119 // Unshifted characters
;     120 
;     121 flash unsigned char unshifted[68][2]={

	.CSEG
;     122 0x0d,9,
;     123 0x0e,'|',
;     124 0x15,'a',
;     125 0x16,'&',
;     126 0x1a,'w',
;     127 0x1b,'s',
;     128 0x1c,'q',
;     129 0x1d,'z',
;     130 0x1e,'',
;     131 0x21,'c',
;     132 0x22,'x',
;     133 0x23,'d',
;     134 0x24,'e',
;     135 0x25,0x27,
;     136 0x26,'"',
;     137 0x29,' ',
;     138 0x2a,'v',
;     139 0x2b,'f',
;     140 0x2c,'t',
;     141 0x2d,'r',
;     142 0x2e,'(',
;     143 0x31,'n',
;     144 0x32,'b',
;     145 0x33,'h',
;     146 0x34,'g',
;     147 0x35,'y',
;     148 0x36,'-',
;     149 0x39,',',
;     150 0x3a,',',
;     151 0x3b,'j',
;     152 0x3c,'u',
;     153 0x3d,'',
;     154 0x3e,'_',
;     155 0x41,';',
;     156 0x42,'k',
;     157 0x43,'i',
;     158 0x44,')',
;     159 0x45,'0',
;     160 0x46,'^',
;     161 0x49,':',
;     162 0x4a,'-',
;     163 0x4b,'l',
;     164 0x4c,'',
;     165 0x4d,'p',
;     166 0x4e,')',
;     167 0x52,'',
;     168 0x54,'',
;     169 0x55,'',
;     170 0x5a,'',
;     171 0x5b,'"',
;     172 0x5d,'',
;     173 0x61,'<',
;     174 0x66,'',
;     175 0x69,'1',
;     176 0x6b,'4',
;     177 0x6c,'7',
;     178 0x70,'0',
;     179 0x71,',',
;     180 0x72,'2',
;     181 0x73,'5',
;     182 0x74,'6',
;     183 0x75,'8',
;     184 0x79,'+',
;     185 0x7a,'3',
;     186 0x7b,'!',
;     187 0x7c,'*',
;     188 0x7d,'9',
;     189 0,0
;     190 };
;     191 
;     192 flash unsigned char shifted[68][2]={
;     193 0x0d,'',
;     194 0x0e,'',
;     195 0x15,'A',
;     196 0x16,'1',
;     197 0x1a,'W',
;     198 0x1b,'S',
;     199 0x1c,'Q',
;     200 0x1d,'Z',
;     201 0x1e,'2',
;     202 0x21,'C',
;     203 0x22,'X',
;     204 0x23,'D',
;     205 0x24,'E',
;     206 0x25,'4',
;     207 0x26,'3',
;     208 0x29,' ',
;     209 0x2a,'V',
;     210 0x2b,'F',
;     211 0x2c,'T',
;     212 0x2d,'R',
;     213 0x2e,'5',
;     214 0x31,'N',
;     215 0x32,'B',
;     216 0x33,'H',
;     217 0x34,'G',
;     218 0x35,'Y',
;     219 0x36,'6',
;     220 0x39,'L',
;     221 0x3a,'?',
;     222 0x3b,'J',
;     223 0x3c,'U',
;     224 0x3d,'7',
;     225 0x3e,'8',
;     226 0x41,'.',
;     227 0x42,'K',
;     228 0x43,'I',
;     229 0x44,'O',
;     230 0x45,'0',
;     231 0x46,'9',
;     232 0x49,'/',
;     233 0x4a,'',
;     234 0x4b,'L',
;     235 0x4c,'',
;     236 0x4d,'P',
;     237 0x4e,'°',
;     238 0x52,'',
;     239 0x54,'',
;     240 0x55,'+',
;     241 0x5a,'',
;     242 0x5b,'^',
;     243 0x5d,'*',
;     244 0x61,'>',
;     245 0x66,'',
;     246 0x69,'1',
;     247 0x6b,'4',
;     248 0x6c,'7',
;     249 0x70,'0',
;     250 0x71,',',
;     251 0x72,'2',
;     252 0x73,'5',
;     253 0x74,'6',
;     254 0x75,'8',
;     255 0x79,'+',
;     256 0x7a,'3',
;     257 0x7b,'§',
;     258 0x7c,'*',
;     259 0x7d,'9',
;     260 0,0
;     261 };
;     262 #include <lcd.h>
;     263 /* LCD driver routines
;     264 
;     265   CodeVisionAVR C Compiler
;     266   (C) 1998-2000 Pavel Haiduc, HP InfoTech S.R.L.
;     267 
;     268   BEFORE #include -ING THIS FILE YOU
;     269   MUST DECLARE THE I/O ADDRESS OF THE
;     270   DATA REGISTER OF THE PORT AT WHICH
;     271   THE LCD IS CONNECTED!
;     272 
;     273   EXAMPLE FOR PORTB:
;     274 
;     275     #asm
;     276         .equ __lcd_port=0x18
;     277     #endasm
;     278     #include <lcd.h>
;     279 
;     280 */
;     281 
;     282 #ifndef _LCD_INCLUDED_
;     283 #define _LCD_INCLUDED_
;     284 
;     285 #pragma used+
;     286 
;     287 void _lcd_ready(void);
;     288 void _lcd_write_data(unsigned char data);
;     289 // write a byte to the LCD character generator or display RAM
;     290 void lcd_write_byte(unsigned char addr, unsigned char data);
;     291 // read a byte from the LCD character generator or display RAM
;     292 unsigned char lcd_read_byte(unsigned char addr);
;     293 // set the LCD display position  x=0..39 y=0..3
;     294 void lcd_gotoxy(unsigned char x, unsigned char y);
;     295 // clear the LCD
;     296 void lcd_clear(void);
;     297 void lcd_putchar(char c);
;     298 // write the string str located in SRAM to the LCD
;     299 void lcd_puts(char *str);
;     300 // write the string str located in FLASH to the LCD
;     301 void lcd_putsf(char flash *str);
;     302 // initialize the LCD controller
;     303 void lcd_init(unsigned char lcd_columns);
;     304 
;     305 #pragma used-
;     306 #pragma library lcd.lib
;     307 
;     308 #endif
;     309 
;     310 
;     311 // Alphanumeric LCD Module functions
;     312 #asm
   .equ __lcd_port=0x15
;     314 #endasm
;     315 
;     316 
;     317 // Declare your global variables here
;     318 
;     319 
;     320 
;     321 // Prototype des fonctions
;     322 //------------------------
;     323 void decode (unsigned char sc);
;     324 
;     325 // External Interrupt 0 service routine
;     326 // Sous-programme de capture du caractère envoyé par le clavier
;     327 //-------------------------------------------------------------
;     328 interrupt [EXT_INT0] void ext_int0_isr(void)
;     329 {
_ext_int0_isr:
	RCALL __SAVEISR
;     330 static unsigned char data; // contient le code de la touche reçue

	.DSEG

	.CSEG
;     331 static unsigned char edge = 0; // 0 = front descendant 1 = front montant

	.DSEG

	.CSEG
;     332 static unsigned char bitcount = 11;

	.DSEG

	.CSEG
;     333 
;     334 if (!edge)
	TST  R5
	BRNE _0xD
;     335  {
;     336    if (bitcount < 11 && bitcount > 2)
	LDI  R30,LOW(11)
	CP   R6,R30
	BRSH _0xF
	LDI  R30,LOW(2)
	CP   R30,R6
	BRLO _0x10
_0xF:
	RJMP _0xE
_0x10:
;     337     {
;     338       data = (data >> 1);
	LSR  R4
;     339       if (PINA.0)
	SBIS 0x19,0
	RJMP _0x11
;     340         data = data | 0x80;
	MOV  R30,R4
	ORI  R30,0x80
	MOV  R4,R30
;     341     }                      
_0x11:
;     342     MCUCR = 3; // INT0 actif sur le prochain front descendant
_0xE:
	LDI  R30,LOW(3)
	OUT  0x35,R30
;     343     edge = 1;
	LDI  R30,LOW(1)
	MOV  R5,R30
;     344  }
;     345  else
	RJMP _0x12
_0xD:
;     346   {
;     347     MCUCR = 2; // INT0 actif sur le prochain front montant
	RCALL SUBOPT_0x0
;     348     edge = 0;
	CLR  R5
;     349     if (--bitcount ==0)
	DEC  R6
	BRNE _0x13
;     350      {
;     351        decode(data);
	ST   -Y,R4
	RCALL _decode
;     352        bitcount = 11;
	LDI  R30,LOW(11)
	MOV  R6,R30
;     353      }
;     354   }
_0x13:
_0x12:
;     355 }
	RCALL __LOADISR
	RETI
;     356 
;     357 
;     358 
;     359 void main(void)
;     360 {
_main:
;     361 
;     362 // External Interrupt(s) initialization
;     363 // INT0: On
;     364 // INT0 Mode: Falling Edge
;     365 // INT1: Off
;     366 GIMSK=0x40;
	LDI  R30,LOW(64)
	OUT  0x3B,R30
;     367 MCUCR=0x02;
	RCALL SUBOPT_0x0
;     368 GIFR=0x40;
	LDI  R30,LOW(64)
	OUT  0x3A,R30
;     369 
;     370 // Timer(s)/Counter(s) Interrupt(s) initialization
;     371 TIMSK=0x00;
	CLR  R30
	OUT  0x39,R30
;     372 
;     373 // LCD module initialization
;     374 lcd_init(16);
	LDI  R30,LOW(16)
	ST   -Y,R30
	RCALL _lcd_init
;     375 
;     376 // Global enable interrupts
;     377 #asm("sei")
	sei
;     378 
;     379 while (1)
_0x15:
;     380       {
;     381       	// Place your code here
;     382       };
	RJMP _0x15
;     383 }
_0x18:
	RJMP _0x18
;     384 
;     385 
;     386 // Sous programme de décodage et d'affichage de la touche
;     387 //------------------------------------------------------- 
;     388 void decode (unsigned char sc)
;     389 {
_decode:
;     390  static unsigned char is_up=0, shift = 0;

	.DSEG

	.CSEG
;     391  unsigned char i;
;     392  
;     393  if (!is_up) // dernier caractère reçu = touche relâchée
	ST   -Y,R16
;	sc -> Y+1
;	i -> R16
	TST  R7
	BRNE _0x1A
;     394   {
;     395     switch (sc)
	LDD  R30,Y+1
;     396      {
;     397        case 0xf0 ://touche relâchée
	CPI  R30,LOW(0xF0)
	BRNE _0x1E
;     398         is_up = 1;
	LDI  R30,LOW(1)
	MOV  R7,R30
;     399        break;
	RJMP _0x1D
;     400        
;     401        case 0x12 : // détection shift gauche
_0x1E:
	CPI  R30,LOW(0x12)
	BRNE _0x1F
;     402         shift = 1;
	RCALL SUBOPT_0x1
;     403        break;
	RJMP _0x1D
;     404        
;     405        case 0x59 : // détection shift droite
_0x1F:
	CPI  R30,LOW(0x59)
	BRNE _0x21
;     406         shift = 1;
	RCALL SUBOPT_0x1
;     407        break;
	RJMP _0x1D
;     408  
;     409        default:
_0x21:
;     410           if (!shift) // shift non appuyé
	TST  R8
	BRNE _0x22
;     411            {
;     412             for (i = 0; unshifted[i][0] != sc && unshifted[i][0]; i++);
	LDI  R16,LOW(0)
_0x24:
	RCALL SUBOPT_0x2
	RCALL SUBOPT_0x3
	BREQ _0x26
	RCALL SUBOPT_0x2
	CPI  R30,0
	BRNE _0x27
_0x26:
	RJMP _0x25
_0x27:
	SUBI R16,-1
	RJMP _0x24
_0x25:
;     413               if (unshifted[i][0] == sc) 
	RCALL SUBOPT_0x2
	RCALL SUBOPT_0x3
	BRNE _0x28
;     414                {
;     415                 lcd_putchar(unshifted[i][1]);
	LDI  R26,LOW(_unshifted*2)
	LDI  R27,HIGH(_unshifted*2)
	RCALL SUBOPT_0x4
	ADIW R30,1
	LPM
	MOV  R30,R0
	RCALL SUBOPT_0x5
;     416                 // à compléter
;     417                }
;     418            }
_0x28:
;     419           else // si shift appuyé
	RJMP _0x29
_0x22:
;     420            {
;     421             for (i = 0; shifted[i][0] != sc && shifted[i][0]; i++);
	LDI  R16,LOW(0)
_0x2B:
	RCALL SUBOPT_0x6
	RCALL SUBOPT_0x7
	BREQ _0x2D
	RCALL SUBOPT_0x6
	LPM
	MOV  R30,R0
	CPI  R30,0
	BRNE _0x2E
_0x2D:
	RJMP _0x2C
_0x2E:
	SUBI R16,-1
	RJMP _0x2B
_0x2C:
;     422               if (shifted[i][0] == sc) 
	RCALL SUBOPT_0x6
	RCALL SUBOPT_0x7
	BRNE _0x2F
;     423                {
;     424                 lcd_putchar(shifted[i][1]);
	RCALL SUBOPT_0x6
	ADIW R30,1
	LPM
	MOV  R30,R0
	RCALL SUBOPT_0x5
;     425                 // à compléter
;     426                } 
;     427            }  
_0x2F:
_0x29:
;     428        break;  
;     429      }
_0x1D:
;     430   }  
;     431           
;     432  else
	RJMP _0x30
_0x1A:
;     433   {
;     434     is_up = 0;
	CLR  R7
;     435     switch (sc)
	LDD  R30,Y+1
;     436      {
;     437        case 0x12 : // détection shift gauche
	CPI  R30,LOW(0x12)
	BRNE _0x34
;     438         shift = 0;
	CLR  R8
;     439        break;
	RJMP _0x33
;     440        
;     441        case 0x59 : // détection shift droite
_0x34:
	CPI  R30,LOW(0x59)
	BRNE _0x33
;     442         shift = 0;
	CLR  R8
;     443        break;         
;     444      } 
_0x33:
;     445   }
_0x30:
;     446   
;     447 }
	LDD  R16,Y+0
	ADIW R28,2
	RET

	.DSEG
__base_y:
	.BYTE 0x4
    .equ __lcd_direction=__lcd_port-1
    .equ __lcd_pin=__lcd_port-2
    .equ __lcd_rs=0
    .equ __lcd_rd=1
    .equ __lcd_enable=2
    .equ __lcd_busy_flag=7

	.CSEG
__lcd_ready:
    in    r26,__lcd_direction
    andi  r26,0xf                 ;set as input
    out   __lcd_direction,r26
    sbi   __lcd_port,__lcd_rd     ;RD=1
    cbi   __lcd_port,__lcd_rs     ;RS=0
__lcd_busy:
    rcall __lcd_delay
    sbi   __lcd_port,__lcd_enable ;EN=1
    rcall __lcd_delay
    sbic  __lcd_pin,__lcd_busy_flag
    rjmp  __lcd_busy
    cbi   __lcd_port,__lcd_enable ;EN=0
	RET
__lcd_write_nibble:
    andi  r26,0xf0
    or    r26,r27
    out   __lcd_port,r26          ;write
    sbi   __lcd_port,__lcd_enable ;EN=1
    rcall __lcd_delay
    cbi   __lcd_port,__lcd_enable ;EN=0
__lcd_delay:
    nop
    nop
    nop
    nop
    nop
    nop
    ret
__lcd_write_data:
    cbi  __lcd_port,__lcd_rd 	  ;RD=0
    in    r26,__lcd_direction
    ori   r26,0xf7                ;set as output
    out   __lcd_direction,r26
    in    r27,__lcd_port
    andi  r27,0xf
    ld    r26,y
    rcall __lcd_write_nibble      ;RD=0, write MSN
    ld    r26,y
    swap  r26
    rcall __lcd_write_nibble      ;write LSN
    sbi   __lcd_port,__lcd_rd     ;RD=1
	ADIW R28,1
	RET
_lcd_gotoxy:
	RCALL __lcd_ready
	LD   R30,Y
	CLR  R31
	SUBI R30,LOW(-__base_y)
	SBCI R31,HIGH(-__base_y)
	LD   R30,Z
	LDD  R26,Y+1
	ADD  R30,R26
	RCALL SUBOPT_0x8
	LDD  R9,Y+1
	LDD  R10,Y+0
	ADIW R28,2
	RET
_lcd_clear:
	RCALL __lcd_ready
	LDI  R30,LOW(12)
	RCALL SUBOPT_0x8
	RCALL __lcd_ready
	LDI  R30,LOW(1)
	RCALL SUBOPT_0x8
	CLR  R30
	MOV  R10,R30
	MOV  R9,R30
	RET
_lcd_putchar:
    push r30
    push r31
    ld   r26,y
    set
    cpi  r26,10
    breq __lcd_putchar1
    clt
	INC  R9
	CP   R11,R9
	BRSH _0x3B
	__lcd_putchar1:
	INC  R10
	CLR  R30
	ST   -Y,R30
	ST   -Y,R10
	RCALL _lcd_gotoxy
	brts __lcd_putchar0
_0x3B:
    rcall __lcd_ready
    sbi  __lcd_port,__lcd_rs ;RS=1
    ld   r26,y
    st   -y,r26
    rcall __lcd_write_data
__lcd_putchar0:
    pop  r31
    pop  r30
	ADIW R28,1
	RET
__long_delay:
    clr   r26
    clr   r27
__long_delay0:
    sbiw  r26,1         ;2 cycles
    brne  __long_delay0 ;2 cycles
	RET
_lcd_init:
    cbi   __lcd_port,__lcd_enable ;EN=0
    cbi   __lcd_port,__lcd_rs     ;RS=0
	LDD  R11,Y+0
	LD   R30,Y
	SUBI R30,-LOW(128)
	__PUTB1MN __base_y,2
	LD   R30,Y
	SUBI R30,-LOW(192)
	__PUTB1MN __base_y,3
	RCALL SUBOPT_0x9
	RCALL SUBOPT_0x9
	RCALL SUBOPT_0x9
	RCALL __long_delay
	LDI  R30,LOW(32)
	RCALL SUBOPT_0x8
	RCALL __lcd_ready
	LDI  R30,LOW(40)
	RCALL SUBOPT_0x8
	RCALL __lcd_ready
	LDI  R30,LOW(6)
	RCALL SUBOPT_0x8
	RCALL _lcd_clear
	ADIW R28,1
	RET

;OPTIMIZER ADDED SUBROUTINE, CALLED 2 TIMES
SUBOPT_0x0:
	LDI  R30,LOW(2)
	OUT  0x35,R30
	RET

;OPTIMIZER ADDED SUBROUTINE, CALLED 2 TIMES
SUBOPT_0x1:
	LDI  R30,LOW(1)
	MOV  R8,R30
	RET

;OPTIMIZER ADDED SUBROUTINE, CALLED 3 TIMES
SUBOPT_0x2:
	LDI  R26,LOW(_unshifted*2)
	LDI  R27,HIGH(_unshifted*2)
	MOV  R30,R16
	CLR  R31
	LSL  R30
	ROL  R31
	ADD  R30,R26
	ADC  R31,R27
	LPM
	MOV  R30,R0
	RET

;OPTIMIZER ADDED SUBROUTINE, CALLED 4 TIMES
SUBOPT_0x3:
	MOV  R26,R30
	LDD  R30,Y+1
	CP   R30,R26
	RET

;OPTIMIZER ADDED SUBROUTINE, CALLED 5 TIMES
SUBOPT_0x4:
	MOV  R30,R16
	CLR  R31
	LSL  R30
	ROL  R31
	ADD  R30,R26
	ADC  R31,R27
	RET

;OPTIMIZER ADDED SUBROUTINE, CALLED 2 TIMES
SUBOPT_0x5:
	ST   -Y,R30
	RJMP _lcd_putchar

;OPTIMIZER ADDED SUBROUTINE, CALLED 4 TIMES
SUBOPT_0x6:
	LDI  R26,LOW(_shifted*2)
	LDI  R27,HIGH(_shifted*2)
	RJMP SUBOPT_0x4

;OPTIMIZER ADDED SUBROUTINE, CALLED 2 TIMES
SUBOPT_0x7:
	LPM
	MOV  R30,R0
	RJMP SUBOPT_0x3

;OPTIMIZER ADDED SUBROUTINE, CALLED 9 TIMES
SUBOPT_0x8:
	ST   -Y,R30
	RJMP __lcd_write_data

;OPTIMIZER ADDED SUBROUTINE, CALLED 3 TIMES
SUBOPT_0x9:
	RCALL __long_delay
	LDI  R30,LOW(48)
	RJMP SUBOPT_0x8

__SAVEISR:
	ST   -Y,R0
	ST   -Y,R1
	ST   -Y,R22
	ST   -Y,R23
	ST   -Y,R24
	ST   -Y,R25
	ST   -Y,R26
	ST   -Y,R27
	ST   -Y,R30
	ST   -Y,R31
	IN   R0,SREG
	ST   -Y,R0
	RET

__LOADISR:
	LD   R0,Y+
	OUT  SREG,R0
	LD   R31,Y+
	LD   R30,Y+
	LD   R27,Y+
	LD   R26,Y+
	LD   R25,Y+
	LD   R24,Y+
	LD   R23,Y+
	LD   R22,Y+
	LD   R1,Y+
	LD   R0,Y+
	RET

	.ORG 0x00

;INTERRUPT VECTORS
	RJMP __RESET
	RJMP _ext_int0_isr
	RJMP 0
	RJMP 0
	RJMP 0
	RJMP 0
	RJMP 0
	RJMP 0
	RJMP 0
	RJMP 0
	RJMP 0
	RJMP 0
	RJMP 0
	RJMP 0
	RJMP 0
	RJMP 0
	RJMP 0
